The working principles of modern FIB systems will be reviewed. The SEM/FIB similarities and differences, some FIB application and the limitations and possibilities of FIB will be discussed
Direct write metallization is an important approach for circuit modification and prototyping. We investigate the evolution of the chemical vapor deposition of tungsten induced by a 50keV focused Ga+ ion beam. Time resolved imaging in combination with atomic force microscopy reveals, that the deposition proceeds via two clearly distinguishable regimes of layer growth. Deposition starts with the nucleation of nanoscale tungsten deposits scattered over the substrate surface. After merging the particles to a contiguous tungsten layer, the second regime of growth characterized by deposition of tungsten on a tungsten surface sets on. Deposition yields up to 3.5 atoms per incident gallium ion are achieved. The layer quality is determined by Auger electron analysis and depth profiling by secondary ion mass spectrometry. In order to give a concise description of the experimental findings the data were interpreted utilizing an analytic model.
To edit an IC through its silicon requires some new understanding. In regards to editing through the interconnection side, interconnections are essentially passive elements of the integrated active components and thus do not require more than high isolation resistance cuts and low resistance contacts. However, there can be cases due to ion beam interactions with the dielectric surface where charge is dumped into a floating gate and damages the gate as evidenced by changes in transistor parameters.
Editing through silicon results in new issues. The most critical are those arising because the sensitive active areas must be crossed before the interconnections are reached [1]. Intel has reported that ~50% of the through silicon edits done there involve diffusions [2]. This is for 2 reasons, first the availability of the diffusions and secondly the diffusion density precludes some FIB operations without milling through diffusions. The reliability of through-silicon repairs has been tested through accelerated temperatures and voltages and found the edits to be robust as far as design verification and system validation [2]. The various issues associated with through silicon editing will be discussed. These issues include: device thinning, substrate isolation, reduction of active areas, leakage currents and contacting active areas. Figure 1. Illustration of possible leakage issue due to FIB damage to the depletion region isolating the n-well and p-substrate.
P Ullmann, C. G. Talbot, R. A. Lee, C Orjuela, R. Nicholson "A Robust Backside Flip-Chip Probing Methodology", Proc. 22nd ISTFA (1996) 381.
R Livengood, P Winer, J Giacobbe, J Stinson, J Finnegan, "Advanced Micro-surgery Techniques and Material Parasitics for Debug of Flip-Chip Microprocessor," Proc. 25th ISTFA (1999) 477.
Editing circuits in silicon has a well-established value, beneficial for all IC manufacturers. As the design rules shrink, smaller dimensions of the objects demand improvements in imaging and endpoint capabilities of FIB circuit editing systems. We will present a series of images, with brief overview of current developments and potential improvements in FIB capabilities that can address demands of 130nm node and beyond.
It is shown, how gate oxide fails of MOS transistors can be detected with passive voltage contrast. By comparison with electrical data we were able to determine which leakage current is necessary to show a clear voltage contrast in FIB. After localisation we used the FIB for local top down preparation down to the gate conductor stack. The final preparation steps were performed by dry and wet etch procedures. With the high resolution SEM several tiny gate oxide fails could be detected.
The FIB technique of microscopy and nanomachining, that is widely spread in semiconductor technology, is reshuffled to open new horizons in the field of life sciences at cellular and subcellular level. The proposed technique can be reasonably inscribed in the field of “nanobiotechnologies” and be structured in three different and interplaying set of operations: ultramicroscopy, tomography and biological manipulations of cells and cell membrane at nanoscale thus providing information on cell characterisation, cell division time sequence, inner structures and membrane structural properties. It has been therefore proven that FIB allows easy target cell selection, fast operation, high resolution, 3D imaging and sample manipulation during imaging and it represents therefore a revolution in ultramicroscopy in the biological field.
Focused ion beam (FIB) systems are routinely used for the preparation of both plan-view (P-V) and cross-section (X-S) TEM specimens. Here we describe a technique for the preparation of a TEM XS specimen from a FIB prepared PV specimen which enables a selected region of a PV specimen to be further analysed in XS. The feasibility of whether it is possible to extend this to taking numerous sequential slices through a TEM specimen for tomography and 3-D reconstruction is discussed.
For gate oxides of less than 5 nm thickness, the damage area of a breakdown site is expected to be very small and probably close to the atomic scale as discussed for soft breakdown events. It is very difficult to prepare a TEM-lamella that contains a nanometer-sized feature. In a new approach, a lamella is prepared containing the complete transistor with the breakdown site. This technique is introduced, and first promising results are discussed. It will be especially useful for short-channel transistors in emerging CMOS technologies.
TEM analysis is becoming an increasingly important analysis technique due to its ability to cope with many of the analysis requirements imposed by deep sub micron IC technology. TEM analyses in the IC industry require fast, reliable and flexible thin sample preparation techniques virtually free of preparation artefacts.
Last year we presented an in-situ lift out technique based on the combination of a modified 1 degree of freedom (1 DOF) gas-injector equipped with a standard W probe needle and the accurate 3 DOF stage already present in the FIB. After a short review of the present status of this technique we will present examples where the additional possibilities offered by this highly flexible technique are elucidated. These include the preparation of a FIB TEM X-section from a polished TEM plan-view sample and artefact free FIB specimen thinning of TEM samples used to image dopant profiles using TEM holography.
With the tremendous current interest in miniaturization and nanofabrication, the need to develop innovative new routes to nanoscale patterning is evident. Conventional lithographic techniques accessing the nanoscale regime usually involve time consuming and costly serial processing. It is hence desirable to find low-cost alternatives which combine speed and ease of reproducibility. A nanocontact printing technique [1] can provide such a simple solution. Here, focused ion beam lithography offers potentially new means for producing nanoscale features with high turnaround time and great flexibility for nanocontact printing. We report on our recent successes in fabricating nanostructured master printheads by direct writing on a silicon substrate using a finely focused (10 nm spot size) gallium ion beam. [2] As shown schematically in Fig. 1 [3], the patterns in the silicon substrate were reproduced in crosslinked polydimethylsiloxane (PDMS), which is the optimum material for nanocontact printing stamps. The amine-terminated polyamidoamine (PMMA) dendrimer generation 4 was used as ink to pattern surfaces with features less than 50 nm size range (see Fig. 2) . We will discuss future possibilities in nanocontact printing offered by focused ion beam processing of print masters.
[1] Y. Xia et al, Annu. Rev. Mater. Sci. 28, 153 (1998).
[2] D. M. Longo et al, Appl. Phys. Lett. 78(7), 981, (2001).
[3] Hongwei Li et al, Nanoletters., 2(4) 347 (2002).
